DVClub Austin - December 6 - Presenter: John Dickol (Samsung)
from Wednesday, December 6, 2017 11:30AM to Wednesday, December 6, 2017 1:30PM
Ticket Information
Event Details
Please join us on December 6th at the Norris Conference Center for a catered lunch and networking. John Dickol from Samsung Austin Research & Design Center (SARC) will present, "I Didn't Know Constraints Could Do That!". 11:30am—Doors Open / Networking 12:00pm—Lunch / Presentation by John Dickol of Samsung 1:00pm—Networking Presentation "I Didn't Know Constraints Could Do That!" by John Dickol, Samsung Austin Research & Design Center Abstract Recent advances in SystemVerilog constraint solver performance make it practical to use more complex constraints in verification environments. This presentation will review some lesser-known SystemVerilog constraint features (soft constraints, hierarchical constraints, array reduction constraints) and provide working examples of using these and other features to create constrained stimulus for complex real-world CPU/SOC verification problems such as testbench configuration, memory map allocation, etc. John Dickol is a Principal Engineer at the Samsung Austin Research and Design Center (SARC) where he is currently developing verification tools and methodologies and looking for new ways to apply SystemVerilog constraints. Before joining SARC, he led verification teams for SOC and DSP projects at MediaTek, Analog Devices, Intel, and IBM. John has a BSEE from Lehigh University and a MSEE from Syracuse University. He has 5 U.S. patents. Register now and bring your colleagues!
Norris Conference Center
2525 W Anderson Ln Austin TX USType: Eventbrite